A switched-capacitor filter looks deceptively simple on paper: a pair of MOS switches, a couple of small capacitors, and a clock. Yet this arrangement replaced racks of discrete resistors and capacitors in countless analog front ends, from telephone line cards in the 1980s to the RF blocker-filtering circuits inside today's software-defined radios. The idea behind it is almost mechanical - a capacitor charged and discharged at a fixed rate behaves, on average, like a resistor whose value depends only on capacitance and clock frequency. That single trick turned filter design into a matter of ratios instead of absolute component values, and ratios are exactly what silicon processes are good at reproducing accurately. The price for that convenience shows up later, in noise, distortion, and a dynamic range ceiling that no amount of clever layout fully removes.
Capacitor Ratios Replace Resistors in Setting the Filter Cutoff Frequency
The core mechanism is a switched capacitor toggling between two nodes at a clock rate much higher than the signal band. Each cycle transfers a packet of charge proportional to the capacitor value and the voltage difference between the nodes, and averaged over many cycles that charge transfer looks exactly like current flowing through a resistor. The equivalent resistance works out to roughly the clock period divided by the capacitance, so doubling the clock frequency halves the effective resistance and doubles the cutoff frequency of whatever filter is built around it. Because the cutoff depends on a capacitor ratio and a clock frequency rather than on the absolute value of a resistor, the filter corner can be trimmed simply by adjusting the clock, and it tracks temperature and process variation far better than an RC network ever could. A typical commercial part such as the LTC1064-1, an 8th order Cauer low-pass filter, illustrates the payoff directly: it holds passband ripple to about 0.1 dB and delivers roughly 72 dB of stopband attenuation at 1.5 times the cutoff frequency, tuned simply by feeding it a 4 MHz clock to reach a 40 kHz corner. Capacitor ratios in modern processes can be matched to around 1 percent, which is a tolerance an RC filter built from separate resistors and capacitors on the same die would struggle to approach without trimming.
On-Chip Integration Makes These Filters Attractive for RF Front Ends
The reason designers reach for switched-capacitor topologies in radio hardware comes down to silicon area and tunability rather than raw performance. A continuous-time active RC filter needs resistors large enough to set a low corner frequency, and large resistors eat chip area and add thermal noise of their own. Switched-capacitor structures sidestep that by using small capacitors and letting the clock do the work of setting the time constant, so the same physical structure can be retuned across a wide frequency range just by changing a digital clock input, with tuning ratios of ten thousand to one or more reported in practical designs. That tunability matters enormously for channel-select filtering ahead of an analog-to-digital converter, where the same silicon needs to serve multiple standards or channel bandwidths without being redesigned for each one. It also matters for anti-aliasing duty, where a switched-capacitor low-pass stage sits directly in front of the converter to bandwidth-limit the signal before sampling, since the number of usable bits the downstream converter can resolve is set largely by the noise and dynamic range this front-end filter contributes. In receiver chains, these filters commonly sit after enough gain to lift weak signals above their own noise floor, precisely because their dynamic range on its own is not generous enough to handle the full swing a strong incoming signal can present.
The kT/C Noise Floor Limits How Quiet a Sampled Capacitor Can Be
Every time a capacitor samples a voltage through a switch, it also samples the thermal noise generated by the switch's own on-resistance. That noise does not depend on how carefully the switch resistance itself is chosen, because a larger resistance produces more noise power but a proportionally longer settling time, and the two effects cancel in the final result. What remains is a floor set purely by the capacitor value and temperature, with the root-mean-square noise voltage scaling as the square root of thermal energy divided by capacitance. Halving that noise voltage means quadrupling the capacitor, which quadruples area and typically the switching current needed to charge it in the same time slot, so noise performance and chip real estate pull in opposite directions from the first line of the design. This relationship is not an incidental engineering headache but close to a fundamental limit: analysis of the trade-off between power consumption, signal-to-noise ratio, and bandwidth in analog circuits puts the absolute minimum value of the governing factor at 8, and real designs sit well above that minimum once parasitic capacitance, switch mismatch, and charge injection are folded in. Early academic work on switched-capacitor integrators went further and showed that the minimum chip area and power needed scale with the square of the desired dynamic range, which is a blunt way of saying that every additional bit of resolution gets progressively more expensive to buy.
Charge Injection and Clock Feedthrough Add Distortion at Every Switching Cycle
Thermal noise sets a floor, but two other mechanisms are what actually push a switched-capacitor filter's distortion figures around: charge injection and clock feedthrough. When a MOS switch turns off, the channel charge that was supporting conduction does not vanish, it splits between the source and drain terminals and dumps part of itself onto the sampling capacitor, shifting the stored voltage by an amount that depends on transistor geometry, oxide capacitance, and how close the input voltage sits to the clock's high level. Clock feedthrough is a separate effect caused by the gate-to-source and gate-to-drain overlap capacitance coupling clock transitions straight into the signal path, and it is often reported in the range of ten millivolts for a simple switch, which sounds small until it is compared against a full-scale signal that might only be a few hundred millivolts in a low-voltage design. Because both errors depend on the input signal level to some degree, they do not just add a fixed offset, they contribute directly to total harmonic distortion, and in the literature this is usually described through the same THD+N expression used elsewhere in mixed-signal design, where second and third harmonic energy is compared against the fundamental plus noise. Designers have a handful of standard countermeasures, used in combination rather than alone:
- matching NMOS and PMOS switch sizes so that their opposite-polarity channel charge partially cancels, which works well as a first-order approximation when both devices are sized equally;
- adding small dummy transistors driven by the complementary clock phase so that the charge they absorb roughly matches what the main switch injects;
- using fully differential circuit topologies so that charge injection and clock feedthrough appear as common-mode errors that cancel at the differential output;
- applying correlated double sampling, where the filter measures its own offset during one clock phase and subtracts it during the next, removing a large share of the residual error.
None of these techniques eliminates the mechanisms outright, they only push the residual error down until it stops being the dominant term next to thermal noise and quantization effects further down the signal chain.
Aliasing and Sampling Constraints Shape the Practical Bandwidth
A switched-capacitor filter is a sampled-data system underneath its continuous-looking transfer function, and that has consequences a passive RC network never has to deal with. Any signal energy at or above the Nyquist limit of half the clock frequency folds back down into the passband and cannot be distinguished from a legitimate in-band signal once it has aliased. In practice, designers are more conservative than the strict Nyquist bound suggests, and a common rule of thumb keeps the highest input frequency at roughly ten percent of the clock rate rather than fifty percent, leaving margin for the rounded shoulders of a real filter response and for any energy near the clock's own harmonics. This is why switched-capacitor stages are almost always preceded by a simple continuous-time anti-aliasing filter, even though the switched-capacitor stage is itself doing the heavy lifting of the actual channel selection further down the chain. The oversampling ratio, the relationship between clock frequency and cutoff frequency, is a practical design variable rather than a fixed constant: a filter with a 5 kHz corner sampled at 250 kHz sits at an oversampling ratio of 50, and shifting that corner down to 3.7 kHz simply means lowering the clock to about 185 kHz while the ratio itself stays fixed. Pushing the oversampling ratio higher relaxes the requirements on the following anti-aliasing filter but raises switching losses and clock-related noise, so the two constraints are tuned against each other rather than chosen independently.
N-Path Filters Extend the Technique Into Blocker Rejection at RF
Classic switched-capacitor biquads mostly operate at baseband or low intermediate frequencies, but a related structure called the N-path filter pushes the same underlying principle up into the RF band itself. Instead of switching a single capacitor at the clock rate, an N-path filter distributes the switching across N parallel capacitor branches, each connected to the input for a fraction of the clock period through non-overlapping phases, commonly a 25 percent duty cycle for a four-path implementation. The result behaves like a bandpass filter centered on the switching frequency, with a quality factor that can reach several hundred in demonstrated designs and a passband that moves wherever the clock is tuned, which makes it attractive as a tunable, reconfigurable front-end filter ahead of a receiver's low-noise amplifier. One published eight-path implementation reported a quality factor up to 300 while tuning across roughly 240 to 530 MHz, entirely by changing the local oscillator frequency feeding the switches, something a fixed LC filter simply cannot do without physically different components. The appeal in a crowded RF environment is selectivity against strong out-of-band interferers, or blockers, sitting close to a wanted channel: the N-path structure shunts that unwanted energy toward the source impedance rather than letting it reach sensitive downstream gain stages, protecting linearity further into the receiver chain. The same switch non-idealities described earlier still apply here, along with an added complication specific to RF operation, harmonic response: because the switching waveform is not a pure sinusoid, the filter also downconverts signals sitting near odd harmonics of the tuning frequency, a problem that pulse-width-modulated clocking schemes have been proposed specifically to suppress.
The Dynamic Range Trade-off Shows Up Hardest in Real Designs
Put the noise floor, the distortion mechanisms, and the sampling constraints together and the practical ceiling on switched-capacitor dynamic range becomes clear rather than mysterious. Older parts from the early days of the technology carried noise specified in millivolts and total harmonic distortion in whole percentage points, with maximum usable corner frequencies capped below 20 kHz, numbers that made continuous-time active filters the safer choice whenever signal-to-noise ratio actually mattered. Modern implementations have moved that bar substantially, and channel-select switched-capacitor filters inside direct-conversion receivers are commonly cited with dynamic range figures around 80 dB, which is respectable but still meaningfully short of what a well-designed continuous-time active filter stage can offer ahead of it in the same receiver. That gap is exactly why switched-capacitor and N-path stages rarely appear as the sole selectivity element in a serious RF design. They typically sit downstream of enough gain and enough passive or active filtering to keep large blocking signals from ever reaching the switches at full amplitude, because once a strong interferer does reach the sampling capacitors, charge injection and clock feedthrough turn amplitude into distortion products that no amount of clever biquad topology can remove after the fact. The practical engineering lesson is less about chasing a bigger single number and more about placement: switched-capacitor selectivity earns its area and power savings when it operates on a signal that has already been brought down to a level the sampling process can handle cleanly, not when it is asked to be the first line of defense against whatever the antenna happens to pick up.